Commit aa241280 authored by Mark Andrews's avatar Mark Andrews
Browse files

3454. [port] sparc64: improve atomic support. [RT #25182]

parent afe7d4b9
3454. [port] sparc64: improve atomic support. [RT #25182]
3453. [bug] 'rndc addzone' of a zone with 'inline-signing yes;'
failed. [RT #31960]
......
......@@ -72,9 +72,9 @@ isc_atomic_xadd(isc_int32_t *p, isc_int32_t val) {
for (prev = *(volatile isc_int32_t *)p; ; prev = swapped) {
swapped = prev + val;
__asm__ volatile(
"casa [%1] %2, %3, %0"
: "+r"(swapped)
: "r"(p), "n"(ASI_P), "r"(prev));
"casa [%2] %3, %4, %0"
: "+r"(swapped), "=m"(*p)
: "r"(p), "n"(ASI_P), "r"(prev), "m"(*p));
if (swapped == prev)
break;
}
......@@ -92,10 +92,9 @@ isc_atomic_store(isc_int32_t *p, isc_int32_t val) {
for (prev = *(volatile isc_int32_t *)p; ; prev = swapped) {
swapped = val;
__asm__ volatile(
"casa [%1] %2, %3, %0"
: "+r"(swapped)
: "r"(p), "n"(ASI_P), "r"(prev)
: "memory");
"casa [%2] %3, %4, %0"
: "+r"(swapped), "=m"(*p)
: "r"(p), "n"(ASI_P), "r"(prev), "m"(*p));
if (swapped == prev)
break;
}
......@@ -111,9 +110,9 @@ isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val) {
isc_int32_t temp = val;
__asm__ volatile(
"casa [%1] %2, %3, %0"
: "+r"(temp)
: "r"(p), "n"(ASI_P), "r"(cmpval));
"casa [%2] %3, %4, %0"
: "+r"(temp), "=m"(*p)
: "r"(p), "n"(ASI_P), "r"(cmpval), "m"(*p));
return (temp);
}
......
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